Jitter and Latency Evaluation of Phasors Computation in Power Systems

الملخص

This paper evaluates Jitter and Latency in a novel technique for computation of Phasors in power systems. The evaluation is done for dynamically computed Phasors based on streamed Sampled Measured Values provide by the Merging Units (MUs) installed in contemporary power substations. In this evaluation, the effects of Jitter and Latency introduced by the communication network on computed Phasor are tested by using two methods of measuring Jitter which are chosen to handle problems of clock offset and drift. Representative results in evaluating of Phasors computation performance are presented in this paper.